9 Commits (470a0d816ec66f5f72f21b41eab0e7ff74a0d8f0)

Author	SHA1	Message	Date
Disty0	470a0d816e	SDNQ add tensor descriptor kernel to triton mm for Intel Arc	2026-04-04 01:32:34 +03:00
awsr	c4ebef29a9	RUF013 updates	2026-03-24 05:48:19 -07:00
Disty0	d9e628574a	SDNQ add 15, 13, 11 and 9 bit support	2026-03-11 03:39:02 +03:00
Disty0	78efbc7e85	update sdnq	2026-02-24 19:47:30 +03:00
Vladimir Mandic	bfe014f5da	modernize typing	2026-02-19 09:15:37 +01:00
Disty0	784cda80aa	update sdnq	2026-01-14 16:23:26 +03:00
Disty0	db59d2b507	SDNQ handle packed floats in fp mm	2025-12-27 16:29:18 +03:00
Disty0	949ff04577	SDNQ fix fp16 mm with fp8 weights and improve stochastic rounding performance	2025-12-09 17:41:29 +03:00
Disty0	b6e9332cfe	SDNQ de-couple matmul dtype and add fp16 matmul	2025-11-22 02:16:20 +03:00