Commit Graph

126 Commits (2e4e741d47c61730d34e79ae8dae4f7995f7b4a7)

Author SHA1 Message Date
Vladimir Mandic 2e4e741d47 seedvt2
Signed-off-by: Vladimir Mandic <mandic00@live.com>
2025-10-12 15:35:08 -04:00
Disty0 a376f89fd6 Add type checking to SDNQConfig 2025-10-12 01:02:47 +03:00
Disty0 9206d9443e SDNQ add dequantize model 2025-10-12 00:00:53 +03:00
Disty0 9a8ba0fc90 SDNQ unset device specific configs on save 2025-10-11 19:24:09 +03:00
Disty0 f7286c90d5 SDNQ add native pre-quant loader support to from_pretrained 2025-10-11 16:19:11 +03:00
Disty0 6bc83bc296 Prevent accelerate from splitting Linear and Conv layers and causing device mismatch errors 2025-10-11 03:19:30 +03:00
Disty0 0f785880ee SDNQ fix a singular bias not getting offloaded 2025-10-11 02:38:49 +03:00
Disty0 c7aba8589b SDNQ fix Qwen loading 2025-10-11 00:05:09 +03:00
Disty0 2a3deaa064 Check T5 keys before override 2025-10-09 22:46:27 +03:00
Disty0 6995d8c3c6 SDNQ fix T5 loading 2025-10-09 22:42:20 +03:00
Disty0 612df3abbb cleanup 2025-10-09 20:09:34 +03:00
Disty0 a9de8ef152 cleanup 2025-10-09 19:58:57 +03:00
Disty0 e19fb2d833 SDNQ keep the quant configs inside the module subfolder, add dtype cast and don't send to GPU 2025-10-09 19:34:48 +03:00
Vladimir Mandic 70defe6d06 handle load shards
Signed-off-by: Vladimir Mandic <mandic00@live.com>
2025-10-09 11:29:36 -04:00
Vladimir Mandic 6907fcd320 speedup prequant model load
Signed-off-by: Vladimir Mandic <mandic00@live.com>
2025-10-08 13:47:36 -04:00
Disty0 35277a79d3 cleanup x3 2025-10-08 01:21:11 +03:00
Disty0 9c16e2234a cleanup 2025-10-08 01:18:12 +03:00
Disty0 25303bb182 cleanup 2025-10-08 01:16:25 +03:00
Disty0 bdcd07f713 Add add_module_skip_keys to pre-load quant too 2025-10-08 01:11:40 +03:00
Disty0 7fdf400e8b cleanup 2025-10-08 00:41:04 +03:00
Disty0 df03ea9ba8 SDNQ add sdnq_post_load_quant and update Qwen keys 2025-10-08 00:29:36 +03:00
Vladimir Mandic 962cb7115d infra for full-model load/save with quant
Signed-off-by: Vladimir Mandic <mandic00@live.com>
2025-10-07 14:30:45 -04:00
Vladimir Mandic 7fdc880a73 sdnq patches
Signed-off-by: Vladimir Mandic <mandic00@live.com>
2025-10-07 09:43:34 -04:00
Disty0 1cd7b6d63a fix upcast scale check 2025-10-07 01:27:54 +03:00
Disty0 aa0c10440f SDNQ make the loader don't touch the model options by default 2025-10-07 00:15:23 +03:00
Disty0 5306376b2a improve contiguous mm performance 2025-10-06 19:05:46 +03:00
Disty0 be91bbff75 SDNQ add SVD support for Convs 2025-10-06 18:26:42 +03:00
Disty0 c931bf9efa SDNQ add dtype casting to loader 2025-10-06 17:44:52 +03:00
Disty0 5c042c5fb8 cleanup 2025-10-06 11:30:26 +03:00
Vladimir Mandic a315a004e9 linting
Signed-off-by: Vladimir Mandic <mandic00@live.com>
2025-10-05 20:25:33 -04:00
Disty0 23f2deaa58 fix enable_quantized_mamtul 2025-10-06 02:04:28 +03:00
Disty0 1f81a37e8e Set the default svd rank to 32 2025-10-06 01:27:29 +03:00
Disty0 ebb26ac123 SDNQ make load file name configurable 2025-10-06 01:04:00 +03:00
Disty0 0acb571472 SDNQ ass load and save model funcs 2025-10-06 00:57:23 +03:00
Disty0 9e52d0c1fb SDNQ add SVDQuant quantization method 2025-10-05 22:50:30 +03:00
Disty0 428600613a SDNQ fix new transformers again 2025-10-05 15:30:15 +03:00
Disty0 a164f3e0c2 SDNQ Improve UINT3 and below quant speed 2025-10-05 03:12:05 +03:00
Disty0 f2e12a682f SDNQ remove use_contiguous_mm path in re_quant 2025-10-04 19:17:05 +03:00
Disty0 df142afe81 don't use triton mm for nvidia 2025-10-04 18:48:03 +03:00
Disty0 5c5d7d5a86 cleanup 2025-10-04 18:38:18 +03:00
Disty0 99113947bf SDNQ add RDNA2 INT8 support via Triton 2025-10-04 18:31:25 +03:00
Disty0 95a7da7e75 SDNQ use non-contiguous re-quantize 2025-10-03 18:54:58 +03:00
Disty0 54acf1760b Make SDNQ scales compatible with balanced offload 2025-10-03 18:13:55 +03:00
Disty0 c5cab96223 SDNQ simplify check_mats 2025-10-03 02:58:17 +03:00
Disty0 34c2a624aa SDNQ autodetect fp8 tw fallback and disable dynamic compile 2025-10-02 19:40:07 +03:00
Disty0 03382bdd4c SDNQ simplify check_mats 2025-10-01 01:35:51 +03:00
Disty0 0c1d34721c SDNQ use contiguous for intel 2025-09-30 02:37:58 +03:00
Disty0 6b67a9d0c4 SDNQ add check_mats to matmul 2025-09-30 01:58:13 +03:00
Disty0 1b45c145e9 SDNQ re-enable dynamic compile 2025-09-28 20:40:24 +03:00
Disty0 503a178794 Don't load rocm hsa on non wsl envs and remove unused lib hijacks 2025-09-27 11:39:24 +03:00